CSCE5914: Advanced Digital Design

  • Introduction: This course covers all aspects of VLSI design and engineering. The lectures mainly focus on theoretical understanding of CMOS fabrication process; MOS transistors and circuits; Circuit and datapath unit design; Standard cell design and timing characterization; Memory design; Clock tree synthesis; Static timing and power analysis; Floorplanning, placement, and routing; VLSI testing and design for testability. This course includes a lab session, which introduces standard VLSI design flow and commercial CAD tools. Topics include circuit simulation (Synopsys HSpice), standard cell design (Cadence Virtuoso), logic synthesis (Synopsys Design Compiler), automatic place & route (Cadence Innovus), static timing and power analysis (Synopsys Primetime), DRC and LVS (Mentor Graphics Calibre). The final design projects go through a complete VLSI design cycle from standard cell design, circuit design, logic synthesis, physical design, and sign-off verification.
  • Corequisite: Lab component
  • Prerequisite: CSCE 2114/ELEG 2904 Digital Design (with an A) or CSCE 3953 System Synthesis and Modeling (C or higher) or ELEG 3933 Circuits and Electronics (C or higher)
  • Textbook: There is no required textbook for this course. Course notes for all lectures will be used. However, the following books are recommended:
    1. CMOS VLSI Design: A Circuits and Systems Perspective, Neil Weste and David Harris, 2011, ISBN 978-0321547743
    2. Digital Integrated Circuits: A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, Pearson, 2003, 978-0130909961
    3. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools, Erik Brunvand, Pearson, 2010, ISBN 978-0321547996
  • Course Goal: After completing this course, students should be able to do the following:
    1. Understand the theory and modeling of the basic factors affecting the design: performance, power, area, and cost.
    2. Design standard cells and properly size transistors.
    3. Design and Layout large scale digital integrated circuits.
    4. Optimize propagation delay in CMOS digital circuitry on an integrated circuit chip.
    5. Use CAD tools to simulate, synthesis, layout and verify VLSI circuits.