Introduction: This course studies physical design, analysis and optimization of VLSI circuits and systems with emphasis on computational realizations and optimization. We start with some related topics such as graph algorithms, and discuss various well-known algorithms and methodologies in the design process of VLSI circuits, including design partitioning, logic synthesis, floor planning, routing, static timing analysis and performance-driven layout. It requires a basic knowledge of digital circuit design, data structure, and object-oriented programming.
Prerequisites: CSCE 3953 System Synthesis and Modeling (C or higher) and CSCE 3193 Programming Paradigms (C or higher)
Textbook: There is no required textbook for this course. Course notes for all lectures will be used. However, the following books are recommended:
Practical Problems in VLSI Physical Design Automation, Sung Kyu Lim, Springer, 2008, ISBN 978-1402066269
VLSI Physical Design: From Graph Partitioning to Timing Closure, Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu, 2011, ISBN 978-9048195909
VLSI Physical Design Automation: Theory and Practice, Sadiq M. Sait and Habib Youssef, World Scientific, 1999, ISBN 978-9810238834
Course Goal: The objective of this course is to study algorithms and methodologies to solve practical problems in computer-aided VLSI design. We shall discuss how to transform a circuit from a structural to a gate-level representation, and finally into layout and masks. Because of design complexity, such transformation needs to be efficiently carried out using computers so that the resulting layout satisfies topological, geometric, timing, power and manufacturability constraints. Students will also learn to compare the complexity and efficiency of various algorithms for physical design, analysis and optimization, and can implement such algorithms with a programming practice.